Method of improving silicon-on-insulator uniformity
US4735679A · kind A · utility
54Cited by
11References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 30, 1987 |
| Grant date | Apr 5, 1988 |
| Priority date | — |
| Expiry date | Mar 30, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/97
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of improving silicon-on-insulator uniformity using polishing. A polishing stop layer of substantially uniform thickness is provided having a first side which is made coplanar with a first side of a thicker layer of semiconductor material. A polishing process is applied to a second side of the semiconductor material until a second side of the polishing stop layer is encountered, such that the substantially uniform thickness of the polishing stop layer can be used to define the semiconductor material to a layer of uniform thickness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.