Weighted random pattern testing apparatus and method
US4745355A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 1987 |
| Grant date | May 17, 1988 |
| Priority date | — |
| Expiry date | May 11, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/83
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus for testing very large scale integrated circuit devices, most particularly Level Sensitive Scan Design (LSSD) devices, by applying differently configured sequences of pseudo-random patterns in parallel to each of the input terminals of the device under test, collecting the output responses from each of the output terminals in parallel, combining these outputs to obtain a signature which is a predetermined function of all of the sequences of parallel outputs and comparing the test signature with a known good signature obtained by computer simulation. The input test stimuli are further altered in a predetermined fashion as a function of the structure of the device to be tested, to individually weight the inputs in favor of more or less binary ones or zeros.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.