Pipelined data stack with access through-checking
US4757440A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 2, 1984 |
| Grant date | Jul 12, 1988 |
| Priority date | — |
| Expiry date | Apr 2, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1008
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A virtual stack structure utilizing Write Pointers and Read Pointers for providing pipelined data words on a first-in first-out basis to a memory structure is described. The virtual stack structure incorporates a plurality of Stack Registers each having an unique Write Tag and Read Tag associated therewith. The Write Tags are utilized to through-check the decoding of the Write Pointer and to issue Write Tag Error signals when it is determined that the Write Pointer has been improperly decoded. Circuitry is provided for checking the appropriate loading of the Write Pointer in the stack, and issuing an error signal when improper loading is sensed. Each of the Stack Registers has an unique Read Tag associated therewith that is utilized to through-check the decoding of the Read Pointer and to issue Read Tag Error signals when improper decoding is detected. Comparison circuitry is utilized to determine that the Read Pointer has been properly loaded in the stack structure, and to issue an error signal when improper loading is sensed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.