Process for preparing multilayer printed circuit boards
US4761303A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 1986 |
| Grant date | Aug 2, 1988 |
| Priority date | — |
| Expiry date | Nov 10, 2006 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S428/901
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Multilayer printed circuit boards are fabricated by preparing a first layer in conventional manner by forming a resist image on a copper clad substrate, etching away unwanted copper, removing the resist from the circuit pattern and optionally applying a dielectric mask such as conventional solder mask to selected portions of the circuit pattern. A second layer, and optionally one or more subsequent layers, are fabricated by providing an image of a second circuit pattern in a predetermined location on said first layer, the image being formed using a suspension of cuprous oxide in a curable resin material. The image is cured at least partially and subjected to chemical reduction to convert at least a portion of the cuprous oxide to metallic copper such that the unreduced cuprous oxide in resin serves as a dielectric layer. The image is then electrolessly plated with copper to build up the circuit pattern and the latter is selectively coated with a dielectric mask before repeating the cycle to build up one or more additional layers. Solder can be applied to selected areas of any of said printed circuit layers at any appropriate time during fabrication. The above method of fabrication …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.