Non-volatile semiconductor memory device
US4774556A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 1986 |
| Grant date | Sep 27, 1988 |
| Priority date | — |
| Expiry date | Jul 21, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
Abstract
A non-volatile semiconductor memory device comprises a semiconductor substrate of a first conduction type, an impurity buried layer of a second conduction type formed at the surface of the semiconductor substrate for constituting either one of a drain region or a source region, an epitaxial layer of a second conduction type formed at the surface of said impurity buried layer, an insulatiang partition wall extended vertically from the surface of the epitaxial layer surrounding operation regions in the impurity buried layer for defining the operation regions therein, at least one electron holding portion extended vertically with a predetermined distance from the operation regions and disposed within the insulating partition wall apart from the operation region, the impurity buried layer or the drain region by an insulation film of such a thickness as causing a tunnel effect, control gates disposed within the insulation partition wall disposed on every electron holding portions on the side opposite to the operation regions and extended vertically with a certain gap from the electron maintaining portions, and a control gate disposed within the insulating partition wall on every electro…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.