Memory device having backup power supply
US4777626A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 1985 |
| Grant date | Oct 11, 1988 |
| Priority date | — |
| Expiry date | Dec 11, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a reset signal generator for generating a reset signal when the output voltage from a main power supply circuit to supply a driving voltage to a memory decreases to a first predetermined voltage, and a switching circuit for allowing a data holding voltage from a backup power supply to be supplied to the memory in place of the driving voltage from the main power supply circuit in response to the reset signal. This memory device further includes a comparator for generating an inhibiting signal when it detects that the data holding voltage from the backup power supply following generation of the reset signal is lower than the voltage necessary to hold the data in the memory, and a control circuit for setting the memory into an operation inhibition state when it detects that the inhibiting signal was generated from the comparator following the reset signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.