Semiconductor memory device with page and nibble modes
US4789966A · kind A · utility
12Cited by
5References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 24, 1986 |
| Grant date | Dec 6, 1988 |
| Priority date | — |
| Expiry date | Nov 24, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor memory device comprising a memory cell array and array control circuit for controlling the memory cell array and being operable in a page mode or a nibble mode, a mode selection circuit is provided for selective connection for operation in the page mode or for operation in the nibble mode. The mode selection circuit of the invention comprises fuse means which can be blown or left unblown for the selective connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.