Semiconductor device with wiring layer using bias sputtering
US4792842A · kind A · utility
33Cited by
3References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 24, 1987 |
| Grant date | Dec 20, 1988 |
| Priority date | — |
| Expiry date | Nov 24, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device and method for manufacturing the same, which is provided with a first wiring layer whose thickness within a contact hole is great in a lower portion of the contact hole and is small in an upper portion thereof. Since the first wiring layer at the lower portion of the contact hole is sufficiently thick, reaction between a second wiring layer formed on the first wiring layer and a substrate is effectively prevented. The first wiring layer is formed by bias sputtering in which a bias voltage is applied to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.