Patent · US Expired

Semiconductor testing device

US4799009A · kind A · utility

33Cited by
2References
2Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 31, 1983
Grant dateJan 17, 1989
Priority date—
Expiry dateMar 31, 2003

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A wafer testing device in which a plurality of wafers can be tested simultaneously significantly reducing the time required for testing each chip. A prober is provided which receives a wafer to be tested. A probe card is coupled to the prober having a window through which a plurality of semiconductor memory chips on the wafer are observable. A plurality of probes are coupled to the periphery of the window in such a manner that the probes can be brought into contact with bonding pads on the plurality of semiconductor memory chips. A tester is connected to the probes which is capable of simultaneously testing each of the plurality of chips.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.