Patent · US Expired

System for inspecting pattern defects of printed wiring boards

US4799175A · kind A · utility

112Cited by
15References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 10, 1985
Grant dateJan 17, 1989
Priority date
Expiry dateMay 10, 2005

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/2805
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Printed wiring boards (PWBs) applied to this inspection system are previously formed with marks in prescribed positional relation to wiring patterns. Deviation of PWBs with respect to absolute coordinates of the inspection system is detected by reading the marks. The PWBs are sequentially set one by one on a movable table, to be subjected to image acquisition of the marks and inspected areas. A first PWB is image-acquisited whereby obtained binary image data of the inspected area are stored in a memory unit. Thereafter a second PWB is image-acquisited, and in advance to the image acquisition of its inspected area, relative misregistration of the both PWBs is found by deviation data on respective marks of the first and second PWBs. The binary image data of the first PWB is read from the memory unit on the basis of the binary image data of the second PWB. When the binary image data of the first PWB are read, positional correction, i.e., time base correction is performed on the read data to correspond to pixels of the second PWB under image acquisition on the basis of data on the previously found amount of relative misregistration. The data on corresponding pixels of the both PWBs are…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.