Process for forming in a silicon oxide layer a portion with vertical side walls
US4800170A · kind A · utility
10Cited by
5References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 2, 1987 |
| Grant date | Jan 24, 1989 |
| Priority date | — |
| Expiry date | Oct 2, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a buried patterned silicon oxide layer in a silicon chip in which the layer is formed by implanting oxygen into the chip through a mask of silicon oxide on the surface of the silicon chip. The silicon oxide mask is formed to have essentially vertical side walls by interposing an irradiation step between a pair of isotropic wet etching steps in its formation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.