Electrically erasable and electrically programmable read only memory

US4803529A · kind A · utility

Assignee

• Tokyo Shibaura Denki Kabushiki Kaisha · JP

Inventor

• Fujio Masuoka · Yokohama, JP

Key dates

• Filing date: Nov 13, 1981
• Grant date: Feb 7, 1989
• Expiry date: Nov 13, 2001

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/685

Abstract

A semiconductor memory device having a MOS transistor with a floating gate capable of storing data. The MOS transistor has an erase gate which overlaps part of the floating gate with an insulating film interposed therebetween. Upon application of a high voltage on the erase gate, the field emission is caused between the floating gate and the erase gate and the charge stored on the floating gate is removed.