Semiconductor integrated circuit device
US4807190A · kind A · utility
21Cited by
4References
46Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Feb 24, 1987 |
| Grant date | Feb 21, 1989 |
| Priority date | — |
| Expiry date | Feb 24, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4085
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dynamic RAM is provided in which an output voltage of a booster circuit for forming a word line selection timing signal is rendered greater than a power source potential and less than a predetermined potential by providing voltage limitation means, thereby preventing destruction of circuit elements receiving the output voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.