Semiconductor memory device
US4809052A · kind A · utility
6Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 1986 |
| Grant date | Feb 28, 1989 |
| Priority date | — |
| Expiry date | May 7, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device is provided such as the type having flip-flop memory cells each including two bipolar transistors in cross connection with each other. In certain embodiments, at least a part of a Schottky barrier diode or capacitor in the memory cell is formed under a digit line. This memory device is greatly reduced in its required area, and the Schottky barrier diode and capacitor are negligibly influenced by the digit line. In other embodiments, it is arranged to provide different electrodes for the Schottky barrier diode and the capacitor to optimize construction in a minimized space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.