Memory cell with volatile and non-volatile portions having ferroelectric capacitors
US4809225A · kind A · utility
221Cited by
5References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 2, 1987 |
| Grant date | Feb 28, 1989 |
| Priority date | — |
| Expiry date | Jul 2, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell includes an SRAM flip-flop cell having two nodes coupled to ferroelectric capacitors so that when the SRAM is powered down, the ferroelectric devices store data and upon power up, transfer the stored data to the SRAM cell. The ferroelectric devices can be bypassed during normal SRAM operations to reduce hysteresis fatigue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.