Dielectric isolation using isolated silicon by limited anodization of an N+ epitaxially defined sublayer in the presence of a diffusion under film layer
US4810667A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1987 |
| Grant date | Mar 7, 1989 |
| Priority date | — |
| Expiry date | Apr 28, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76283
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to a method of forming an isolated semiconductor, preferably of the vertical bipolar variety, wherein a porous highly doped semiconductor layer is oxidized and, with a trench containing silicon oxide therein, forms a region encasing a moderately doped epitaxial layer disposed beneath a lightly doped epitaxial layer. The vertical bipolar device is formed in the moderately doped and lightly doped layers with the highly doped epitaxially deposited layer, which is now a silicon oxide layer, forming a portion of the isolation. The anodization of the highly doped layer takes place using an anodizing acid at a temperature of from about 0 to about 10 degrees C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.