Method of making devices having thin dielectric layers

US4814291A · kind A · utility

Assignee

• American Telephone and Telegraph Company, AT&T Bell Laboratories · US

Inventors

• Sea C. Kim · Allentown, US
• Alvaro Maury · Orlando, US
• William H. Stinebaugh, Jr. · Bethlehem, US

Key dates

• Filing date: Feb 25, 1986
• Grant date: Mar 21, 1989
• Expiry date: Feb 25, 2006

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/966
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Certain devices require a high quality thin (<25 nanometer) dielectric layer formed on a deposited silicon layer. Applications include capacitor dielectrics in dynamic memories and linear devices. In another application, an electrically erasable programmable read only memory (EEPROM) uses an SiO.sub.2 layer between the write gate and the floating gate. The present technique oxidizes amorphous silicon under conditions that suppress grain growth to produce a higher quality oxide than that achieved with conventional furnace oxidation of polysilicon. Rapid thermal oxidation is one method of practicing the technique.