Hermetically sealed package
US4821151A · kind A · utility
44Cited by
10References
39Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1985 |
| Grant date | Apr 11, 1989 |
| Priority date | — |
| Expiry date | Dec 20, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hermetically sealed package adapted to house a plurality of semiconductor devices. The package include a multi-layer circuit device formed of a plurality of ceramic substrates and conductive circuit patterns disposed therebetween. A ceramic cover having at least one cavity adapted for receiving a semiconductor die is sealed to the multi-layer circuit device. Electrical leads are connected to the semiconductor device and extend outward from the package for connection to the conductive circuit pattern within the multi-layer circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.