Method for manufacturing a fully self-adjusted bipolar transistor
US4829015A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 1988 |
| Grant date | May 9, 1989 |
| Priority date | — |
| Expiry date | Mar 21, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/017
Abstract
A method for manufacturing a fully self-adjustsed bipolar transistor in which the emitter zone, the base zone, and the collector zone are aligned vertically in a silicon substrate; the collector is connected by means of a deeply extending terminal in the substrate, the inactive base zone is embedded in an insulating trench to separate the inactive base zone from the collector; the emitter terminal zone is composed of doped polycrystalline silicon and is separated from the inactive base zone by a silicon oxide layer. A fully self-adjusted bipolar transistor is produced wherein the emitter is self-adjusted relative to the base and the base is self-adjusted relative to the insulation. The number of method steps involving critical mask usage is low, and parasitic regions are minimized so that the switching speed of the component is increased. The transistor is used for integrated bipolar transistor circuits having high switching speeds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.