Semiconductor decoder circuit having switching means for preventing counterflow
US4837462A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1987 |
| Grant date | Jun 6, 1989 |
| Priority date | — |
| Expiry date | Dec 9, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0036
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to a semiconductor device which has a high density of integration and of which a low power consumption is required. The semiconductor device prevents the influence of the amplitude of an input signal upon the amplitude of an output signal in such a way that a preceding circuit and a succeeding circuit are provided with different reference voltages. The semiconductor device is constructed of a circuit which includes a bipolar transistor and an insulated-gate field effect transistor, and which operates with reference to one or more voltages, at least one of the reference voltages having a voltage value different from a reference operating voltage of a preceding circuit. A first switching circuit is interposed between a first reference voltage and an input node of a driver circuit, and a second switching circuit is interposed between an output of a preceding circuit and the input of the driver circuit, so that when an output signal of the preceding circuit is at a high level, the seconding circuit switch is turned "on" while the first switching circuit is turned "off" thereby to produce a still higher potential, and that when the output signal of the preceding ci…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.