Selective application of voltages for testing storage cells in semiconductor memory arrangements
US4839865A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 1986 |
| Grant date | Jun 13, 1989 |
| Priority date | — |
| Expiry date | Nov 24, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic RAM is provided with a plurality of 1-MOSFET memory cells, each having a storage capacitor and a switching MOSFET coupled to one electrode of the storage capacitor. The other electrode of each of the storage capacitors is coupled to a switching circuit which controls the voltage which is applied to the capacitor. The switching circuit is, in turn, coupled to both a voltage generating circuit (which preferably provides a voltage of 1/2 Vcc) and a voltage supply circuit which is set to provide predetermined test voltages. Thus, by operating the switching circuit, a voltage of 1/2 Vcc can be applied to the memory cell capacitors during normal operation of the dynamic RAM, and the predetermined test voltages can be applied to the memory cell capacitors during a testing operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.