Semiconductor memory device and sense amplifier
US4841486A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1986 |
| Grant date | Jun 20, 1989 |
| Priority date | — |
| Expiry date | Dec 29, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/062
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device having a memory plane defined by a plurality of memory cells, a decoder line for accessing the memory cells, a common data line on which a signal output from an accessed memory cell is collected, and a sense amplifier for amplifying the signal collected on the common data line. The sense amplifier has an amplifying circuit portion which is composed of a pair of common-collector type bipolar transistors supplied with the signal collected on the common data line as a differential input, and a plurality of MOS transistors for converting a change in current into a change in voltage. Each of the MOS transistors has a lightly-doped drain structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.