Semiconductor memory device
US4849938A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 1987 |
| Grant date | Jul 18, 1989 |
| Priority date | — |
| Expiry date | Jul 22, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/844
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor memory device of a redundancy configuration having lines (rows or columns) of main memory cells and a line of spare memory cells made to substitute a defective line responsive to the address of the defective line, a comparator compares an address input to the memory device, with the address of the defective line which has been programmed in it, and a spare line selector selects the spare line when the input address is found to coincide with the programmed address. A line decoder is responsive to the input address for selecting one of the lines of the normal memory cells, and is inactivated by the output of the comparator when the input address is found to coincide with the programmed address. An input address to the line decoder is applied before the same input address is applied to the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.