Koichiro Mashiko
58Patents
19h-index
38Co-inventors
84Inventor score
Filing activity: Aug 8, 1980 → Sep 18, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6084255A | Gate array semiconductor device | Electricity | 115 | Expired |
| US5636163A | Random access memory with a plurality amplifier groups for reading and writing in normal and test modes | Physics | 98 | Expired |
| US4912678A | Dynamic random access memory device with staggered refresh | Physics | 84 | Expired |
| US4988891A | Semiconductor neural network including photosensitive coupling elements | Physics | 68 | Expired |
| US4873669A | Random access memory device operable in a normal mode and in a test mode | Physics | 58 | Expired |
| US6177826A | Silicon-on-insulator circuit having series connected PMOS transistors each having connected body and gate | Electricity | 56 | Expired |
| US6034563A | Semiconductor integrated circuit having reduced current leakage and high speed | Electricity | 53 | Expired |
| US5781062A | Semiconductor integrated circuit | Electricity | 51 | Expired |
| US4982370A | Shared sense amplifier semiconductor memory | Physics | 37 | Expired |
| US5012472A | Dynamic type semiconductor memory device having an error checking and correcting circuit | Physics | 37 | Expired |
| US4849938A | Semiconductor memory device | Physics | 36 | Expired |
| US5021988A | Semiconductor neural network and method of driving the same | Physics | 30 | Expired |
| US5475794A | Semiconductor neural network and operating method thereof | Physics | 30 | Expired |
| US5541529A | Field programmable gate array transferring signals at high speed | Electricity | 30 | Expired |
| US4817056A | Semiconductor memory device | Physics | 28 | Expired |
| US5053638A | Semiconductor neural circuit device having capacitive coupling and operating method thereof | Physics | 25 | Expired |
| US6249690A | Portable information equipment system | Electricity | 25 | Expired |
| US5396581A | Semiconductor neural network and operating method thereof | Physics | 23 | Expired |
| US5994935A | Latch circuit and flip-flop circuit reduced in power consumption | Electricity | 19 | Expired |
| US4788457A | CMOS row decoder circuit for use in row and column addressing | Physics | 18 | Expired |
| US4896197A | Semiconductor memory device having trench and stacked polysilicon storage capacitors | Electricity | 17 | Expired |
| US7884751B2 | Time-to-digital converter | Physics | 17 | Active |
| US4710789A | Semiconductor memory device | Physics | 17 | Expired |
| US5274746A | Coupling element for semiconductor neural network device | Physics | 17 | Expired |
| US5003542A | Semiconductor memory device having error correcting circuit and method for correcting error | Physics | 16 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.