High dielectric multilayer capacitor
US4853827A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 29, 1988 |
| Grant date | Aug 1, 1989 |
| Priority date | — |
| Expiry date | Dec 29, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09309
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multilayer capacitor is presented which provides high capacitance and low inductance. The capacitor comprises a plurality of conductive layers, each separated from the other and sandwiching therebetween a high capacitance flexible dielectric sheet material. The dielectric sheet material is comprised of a monolayer of multilayer or single layer high dielectric (e.g. ceramic) chips or pellets of relatively small area and thickness which are arranged in a planar array. These high dielectric constant chips are spaced apart by a small distance. The spaces between the chips are then filled with a flexible polymer/adhesive to define a cohesive sheet with the polymer binding the array of high dielectric (e.g. ceramic) chips together. Next, the opposite planar surfaces of the array (including the polymer) are electroless plated or electroded by vacuum metal deposition, or sputtering, to define opposed metallized surfaces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.