Static random-access memory having multilevel conductive layer
US4853894A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 1987 |
| Grant date | Aug 1, 1989 |
| Priority date | — |
| Expiry date | Jul 9, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
Abstract
A semiconductor memory having static cells each composed of two driver MOS transistors formed on a semiconductor substrate and two transfer MOS transistors and two load resistors, which are formed on the substrate and are connected to the drains of the driver MOS transistors, respectively. A conductive film for fixing the sources of the driver MOS transistors to a ground voltage is formed above the principal surface of the semiconductor substrate, and this conductive film defines one electrode of a capacitance element formed on the substrate. The conductive film is formed over the load resistors formed on the semiconductor substrate so as to constitute an electric field shield for the load resistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.