Trench etch process for a single-wafer RIE dry etch reactor
US4855017A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 8, 1988 |
| Grant date | Aug 8, 1989 |
| Priority date | — |
| Expiry date | Sep 8, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3085
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A plasma dry etch process for trench etching in single slice RIE etch reactors wherein a selective sidewall passivation is accomplished to control the profile of the trench being etched. The process comprises methods of passivating the sidewall by passivation on a molecular scale and by passivation by a veneer type passivation comprising buildup of a macroscopic residue over the surface of the sidewall. Several methods are disclosed for forming and shaping the passivating layers (both mono-atomic and bulk). By carefully controlling the composition and shape of the sidewall passivating veneer in conjunction with other etch factors, the desired trench profiles can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.