Selectively definable semiconductor device
US4855803A · kind A · utility
42Cited by
10References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1988 |
| Grant date | Aug 8, 1989 |
| Priority date | — |
| Expiry date | Jul 26, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/90
Abstract
A selectively definable semiconductor device is provided. In one form, a composite gate array includes a plurality of logic dedicated general purpose cell regions and a plurality of function dedicated cell regions each of which is disposed between the two corresponding ones of the plurality of logic dedicated general purpose cell regions, whereby each of the cell regions may be used as an interconnection region selectively. In another form, a semiconductor memory device which may be selectively defined as a ROM or a RAM by a metalization process is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.