High speed pointer based first-in-first-out memory
US4862419A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 16, 1986 |
| Grant date | Aug 29, 1989 |
| Priority date | — |
| Expiry date | Sep 16, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A FIFO memory system organizes a memory with N word storage locations into M pointer-based random access memories, each containing N/M storage locations. A sequence of data words is written into and read out of the M RAMs in a cyclical fashion. An M fold increase in write rate is obtained by an input control logic which causes all M RAMs to be in a different stage of the shift-in cycle at the same time. Similarly, an M fold increase in read rate is obtained by an output control logic which causes all M RAMs to be simultaneously in a different stage of the shift-out cycle. The output signals of the RAMs being read are multiplexed to generate the original sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.