Digital data bus architecture for computer disk drive controller
US4866601A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1987 |
| Grant date | Sep 12, 1989 |
| Priority date | — |
| Expiry date | Sep 24, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A disk drive controller bus architecture for interfacing disk drives having widely varying data format requirements with small computer systems is comprised of a disk drive parameter storage section, a disk drive parameter compartor/interface section and a set of associated data buses, coupled between a disk drive controller processor and the disk drive. The disk drive parameter storage section contains a set of control registers and a (format option) random access memory which may be written to and read by the control processor and serves to store drive control codes that are selectively coupled over a first of the set of associated data buses for application to the disk drive parameter comparator/interface section. The disk drive parameter comparator/interface section contains multiplexer and format conversion circuitry for interfacing data between the disk, storage/buffer components of the bus architecture itself, and the control processor. This section also contains comparator and auxiliary storage circuitry coupled with a second of the set of associated data buses, for comparing data read from the disk with parameter data stored in and selectively accessed from the disk drive …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.