Dennis E. Gates
24Patents
13h-index
20Co-inventors
81Inventor score
Filing activity: Jun 29, 1979 → Oct 12, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5883909A | Method and apparatus for reducing data transfers across a memory bus of a disk array controller | Physics | 181 | Expired |
| US6216199A | Hardware mechanism for managing cache structures in a data storage system | Physics | 111 | Expired |
| US5959914A | Memory controller with error correction memory test application | Physics | 91 | Expired |
| US4866601A | Digital data bus architecture for computer disk drive controller | Physics | 68 | Expired |
| US6823472B1 | Shared resource manager for multiprocessor computer system | Physics | 63 | Expired |
| US6385683B1 | Methods and apparatus for raid hardware sequencing to achieve a higher performance raid architecture | Physics | 51 | Expired |
| US5634033A | Disk array storage system architecture for parity operations simultaneous with other data operations | Physics | 35 | Expired |
| US5734848A | Method and appartus for transferring data in a controller having centralized memory | Physics | 31 | Expired |
| US7562176B2 | Apparatus and methods for clustering multiple independent PCI express hierarchies | Physics | 29 | Active |
| US6356969B1 | Methods and apparatus for using interrupt score boarding with intelligent peripheral device | Physics | 23 | Expired |
| US7043622B2 | Method and apparatus for handling storage requests | Physics | 18 | Expired |
| US4268561A | Means and method of manufacturing a high strength bar | Emerging Cross-Sectional Technologies | 16 | Expired |
| US6735645B1 | System and method to eliminate race conditions in input/output operations for high bandwidth architectures | Physics | 14 | Expired |
| US6912687B1 | Disk array storage subsystem with parity assist circuit that uses scatter-gather list | Physics | 12 | Expired |
| US7913027B2 | Configurable storage array controller | Physics | 11 | Active |
| US7155537B1 | Infiniband isolation bridge merged with architecture of an infiniband translation bridge | Electricity | 7 | Expired |
| US5012127A | Synchronizer circuit with asynchronous clearing | Electricity | 6 | Expired |
| US6654853B1 | Method of secondary to secondary data transfer with mirroring | Physics | 6 | Expired |
| US6898666B1 | Multiple memory system support through segment assignment | Physics | 5 | Expired |
| US6917990B2 | Method and structure for read prefetch in a storage complex architecture | Physics | 4 | Expired |
| US8756371B2 | Methods and apparatus for improved raid parity computation in a storage controller | Physics | 2 | Active |
| US7035995B2 | Method and apparatus for performing a high speed binary search in time critical environments | Physics | 2 | Expired |
| US4870616A | Compact register set using a psram array | Physics | 1 | Expired |
| US9110796B2 | Apparatus and circuitry for memory-based collection and verification of data integrity information | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.