Compact register set using a psram array
US4870616A · kind A · utility
1Cited by
5References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 29, 1987 |
| Grant date | Sep 26, 1989 |
| Priority date | — |
| Expiry date | Sep 29, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A compact register file circuit, especially valuable for CMOS VLSI circuits used with microcontrollers, which uses a pseudo static random access memory array circuit, a latch array circuit, and a decoder circuit to provide almost identical characteristics as available with a much larger static random access memory as a register set. The only differences visible to the user during a read operation is the requirement of keeping the address data value constant during the active portion of the pseudo static random access memory chip select waveform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.