Dielectrically isolated semiconductor substrate
US4878957A · kind A · utility
58Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1989 |
| Grant date | Nov 7, 1989 |
| Priority date | — |
| Expiry date | Mar 30, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/159
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A dielectrically isolated semiconductor wafer substrate includes first and second semiconductive layers bonded to each other by a direct bonding technique in such a manner that an insulative layer is sandwiched therebetween. The first semiconductive layer is a first silicon layer having a (100) or (110) crystal surface orientation, while the second semiconductive layer is a second silicon layer having a (111) crystal surface orientation. Thereafter, a peripheral portion of the resultant substrate is removed, and a substrate of a slightly smaller size is obtained which is provided with an additionally formed new orientation flat.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.