Programmable logic array having input transition detection for generating precharge
US4893033A · kind A · utility
Inventors
Key dates
| Filing date | Oct 5, 1988 |
| Grant date | Jan 9, 1990 |
| Priority date | — |
| Expiry date | Oct 5, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01721
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic array circuit includes a pulse signal generating circuit for generating a pulse signal by detecting a change in levels of input signals. A first transistor for precharging a product term line is provided. A second transistor is provided for discharging an OR array input line. A third transistor is provided for precharging an OR array output line. The first through third transistors are controlled by the pulse signal. In other words, the first through third transistors are controlled in response to the signal change of the input signals. In order to facilitate the discharging operation with respect to the OR array input line, a fourth transistor may be provided on a side opposite to the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.