Patent · US Expired

Circuit configuration and a method for the testing of storage cells

US4896322A · kind A · utility

8Cited by

2References

12Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Rainer Kraus · Hersbruck, DE
Oskar Kowarik · Grafing, DE
Kurt Hoffmann · Taufkirchen, DE
Manfred Paul · Nackenheim, DE

Key dates

Filing date	Mar 16, 1988
Grant date	Jan 23, 1990
Priority date	—
Expiry date	Mar 16, 2008

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/36
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In a circuit configuration and a method for testing storage cells, all of the bit lines lead to one pair of fault lines which is first precharged with mutually-complementary logic levels. All of the storage cells of a word line are always read-out in parallel relative to one another. In the event of "no fault" the pair of fault lines retains its logic states, whereas in the case of a fault one of the fault lines changes its logic state through switching transistors. This is recognized and analyzed by a comparator circuit in the form of an XOR-circuit or an XNOR-circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.