Method for locos isolation using a framed oxidation mask and a polysilicon buffer layer
US4897364A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 1989 |
| Grant date | Jan 30, 1990 |
| Priority date | — |
| Expiry date | Feb 27, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76216
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved LOCOS device isolation method for forming a field oxide is disclosed having the advantage of controllable and uniform sidewall framing of a nutride oxidation mask. This advantage is achieved by the use of a polysilicon layer overlying a nitride mask with the polysilicon providing an etching endpoint during the anisotropic etching used for sidewall formation. In one embodiment of the invention a silicon substrate is provided having a pad oxide formed on its surface and a first polysilicon stress-relief buffer layer formed overlying the pad oxide. A first nitride layer, to be used for oxidation masking during field oxide growth, is deposited overlying the first polysilicon layer. Next, a second polysilicon, etch-resistant buffer layer is deposited overlying the first nitride layer. The first nitride layer and second polysilicon layer are patterned by conventional lithography while the first polysilicon and pad oxide layers remained unpatterned. A second nitride layer is deposited overlying the patterned second polysilicon layer and exposed regions of the first polysilicon layer. Sidewalls are formed on the edges of the patterned first nitride and second polysilicon layers…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.