Nonvolatile semiconductor memory device and a writing method therefor
US4903236A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 1988 |
| Grant date | Feb 20, 1990 |
| Priority date | — |
| Expiry date | Feb 16, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an erase mode, a high DC voltage Vpp is applied to all of the word lines and zero volt is applied to all of the bit lines, whereby the contents of all of the memory transistors are simultaneously erased. In a write mode, which constitutes an essential feature of the present invention, zero volt is applied to a selected word line and the high DC voltage Vpp is applied to a selected bit line, with an intermediate voltage 1/2.Vpp being applied to the other word lines and bit lines. Thus, by electron tunneling, data is written in a memory transistor located at a point of intersection between the selected word line and the selected bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.