Differential sense amplifier circuit for high speed ROMS, and flash memory devices
US4903237A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 2, 1988 |
| Grant date | Feb 20, 1990 |
| Priority date | — |
| Expiry date | Aug 2, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/062
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit senses the state of an EPROM cell transistor and drives an output lead in response thereto. The circuit comprises first and second sense amplifiers, each having inverting and noninverting input leads. The circuit also comprises a reference voltage lead coupled to the inverting lead of the first sense amplifier and the noninverting lead of the second sense amplifier. An EPROM cell transistor is connected to the noninverting lead of the first sense amplifier and the inverting lead of the second sense amplifier. The first sense amplifier is coupled to a first portion of a buffer circuit which couples the output lead to a VCC supply lead, while the second sense amplifier drives a second portion of a buffer circuit which coupled the output lead to ground.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.