Internally molded isolated package
US4910581A · kind A · utility
17Cited by
4References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 27, 1988 |
| Grant date | Mar 20, 1990 |
| Priority date | — |
| Expiry date | Dec 27, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package having an internally isolated die flag form an externally exposed heatsink is provided by using a two stage molding process. The first molding stage provides a uniform layer of molding material of a predetermined thickness between a die flag area and a heatsink area. A second stage molding procedure then provides the packaging encapsulation thereby establishing the outer dimensions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.