Method and apparatus for arbitration and serialization in a multiprocessor system
US4920485A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 31, 1988 |
| Grant date | Apr 24, 1990 |
| Priority date | — |
| Expiry date | Aug 31, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for providing arbitration between and serialization of plural processors in a multiprocessor system comprising, in each processor, a delay network, a priority circuit, a REQUEST generator, an ORDER generator, a serialization program, an ACK generator and an ACK receiver. In operation, the delay network insures that simultaneously generated REQUESTS received from plural processors are received by the priority circuit at the same time. A processor awarded priority issues an ORDER to the other processors and thereafter drops its REQUEST to allow an award of priority to another processor. An ACK is received by the ORDER issuing processor from each processor when it executes the ORDER. The ORDER issuing processor then completes the task which gave rise to the ORDER. To conserve processing time, priority awards may be made before previously issued ORDERS are completed. Alternatively, REQUEST issuing processors can simply hold their REQUEST and thereby prevent interruption of instructions or groups of instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.