Multi-chip module structure
US4930002A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 1988 |
| Grant date | May 29, 1990 |
| Priority date | — |
| Expiry date | Mar 22, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a pin grid array type multi-chip module structure comprised of a ceramic multi-layer wiring board having the top surface on which a plurality of semiconductor devices are carried, divisional board areas each having the same size are respectively allotted to individual semiconductor devices of the same type. Within respective divisional board areas, the positional relation between the array arrangement of connecting pads on the top surface for connection to the semiconductor devices and the array arrangement of I/O pins on the bottom surface of the board is so determined as to be constant. Metallized patterns inside the board which are to be connected power supply I/O pins and ground I/O pins are made constant for respective divisional board areas allotted to individual semiconductor devices of the same type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.