Metallization contact system for large scale integrated circuits
US4933742A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 1988 |
| Grant date | Jun 12, 1990 |
| Priority date | — |
| Expiry date | Feb 1, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A contact metal such as tungsten, platinum silicide or palladium silicide is selectively deposited or formed on the semiconductor substrate portion of an integrated circuit chip. The metallization pattern for the circuit makes contact with the contact metal at the bottom of a contact opening or via, rather than contacting the substrate directly. Thus, the interconnection metal makes contact to the semiconductor surface through an intermediate contact metal so as to provide decreased contact resistance. This permits narrower interconnect metallization patterns so as to facilitate the construction of denser integrated circuits. In the present invention, therefore, metal framing of the contact hole is not employed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.