Non-volatile semiconductor memory device
US4933906A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 1988 |
| Grant date | Jun 12, 1990 |
| Priority date | — |
| Expiry date | Nov 18, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device of erasable programmable rear only memory type is disclosed the memory device has a pair of memory cell arrays between which a differential amplifier is provided. Each of the memory cell arrays has a current-to-voltage converter circuit associated therewith. When a memory cell in either one of the pair of memory cell array is selected, a bit line being coupled to the selected memory cell is charged by one current-voltage conversion circuit, while at the same time at least one bit line in the other memory cell array where no memory cell has been selected is charged by the associated current-voltage converter circuit at arrayed different from the bit line coupled to the selected memory cell. A differential amplifier senses and amplifies a potential difference between the charged bit lines to provide a high speed read-out of the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.