Data processing system parallel data bus having a single oscillator clocking apparatus
US4943984A · kind A · utility
65Cited by
11References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1988 |
| Grant date | Jul 24, 1990 |
| Priority date | — |
| Expiry date | Jun 24, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4217
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A synchronous parallel data bus particularly adapted for use in a data processing system where it is necessary to transfer data over long distances. The physical connection between communicating units includes a plurality of wires adapted to carry the parallel data signal and a wire which carries a clock signal to the remote unit. When data is transmitted from the remote unit to the base unit, the clock signal which originated at the base unit and was transmitted to the remote unit is "turned around" and transmitted back to the base unit for use in receiving the data from the remote unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.