Patent · US Expired

Complementary transistor structure and method for manufacture

US4951115A · kind A · utility

10Cited by
9References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 6, 1989
Grant dateAug 21, 1990
Priority date
Expiry dateMar 6, 2009

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/673

Abstract

A complementary bipolar transistor structure having one symmetrical intrinsic region for both the NPN and PNP transistors and a method for fabricating the structure. The transistor structure includes a vertical NPN transistor operating in the upward direction and a vertical PNP transistor operating in a downward direction. In the method, the sub-emitter and the sub-collector regions are formed by depositing a first epitaxial layer of semiconductor material of a first conductivity type on the surface of a semiconductor substrate of a second conductivity type, and forming the sub-collector by etching a shallow trench in the first layer and depositing semiconductor material of a second conductivity type by LTE and planarizing. The intrinsic regions for both of the transistors are formed by depositing a second layer of semiconductor material of the second conductivity type on the surface of the first layer and a third layer of semiconductor material of the first conductivity type on the surface of the second layer by either LTE or MBE. In one embodiment, the second and third layers are provided with a uniform vertical doping profile for one thickness of the layer and a graded doping pr…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.