Interleaved sensing system for FIFO and burst-mode memories
US4954987A · kind A · utility
66Cited by
1References
20Claims
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Key dates
| Filing date | Jul 17, 1989 |
| Grant date | Sep 4, 1990 |
| Priority date | — |
| Expiry date | Jul 17, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interleaved sensing system for decreasing the read access time in a sequential memory includes a sequential memory array formed of a plurality of memory cells for storing data. The memory cells are arranged in a plurality of odd columns and a plurality of even columns. Sensing means are provided for interleaving the stored data in the memory cells in the odd columns with the stored data in the memory cells in the even columns. An output buffer is coupled to the sensing means for generating data output representing alternately the stored data in the odd and even columns during alternate read cycles.
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