Nonvolatile semiconductor memory device and a writing method using electron tunneling
US4958317A · kind A · utility
49Cited by
5References
10Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 27, 1988 |
| Grant date | Sep 18, 1990 |
| Priority date | — |
| Expiry date | Jul 27, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Externally inputted data of one word line is temporarily stored in a latch circuit. In the writing cycle, the data stored and held in the latch circuit is collectively written in memory transistors connected to the selected word line. On this occasion, 0 V is applied to one of the control gate and the drain of the memory transistor in which "0" is written and a high voltage V.sub.PP is applied to the other of the control gate and the drain. Therefore, not only in the erasing cycle but also in the writing cycle, the operation is carried out by the movement of charges caused by the electron tunneling.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.