Ceramic hybrid integrated circuit having surface mount device solder stress reduction
US4959751A · kind A · utility
9Cited by
10References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 17, 1989 |
| Grant date | Sep 25, 1990 |
| Priority date | — |
| Expiry date | Jan 17, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/092
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A printed circuit board assembly uses a conductive pattern that includes both firmly adherent conductors and controllably adherent conductors. The controllably adhering conductors are free to lift off the printed circuit board to relieve mechanical forces caused by thermal stresses at solder joints between the controllably adherent conductors and integrated circuit chips of the assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.