Method for producing amorphous silicon thin film transistor array substrate
US4960719A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1989 |
| Grant date | Oct 2, 1990 |
| Priority date | — |
| Expiry date | Jan 23, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/443
Abstract
A method for producing an amorphous silicon thin film transistor array substrate comprising successively coating a gate insulating layer, an amorphous silicon layer and a protective insulating layer on a glass substrate provided with a gate electrode and a gate wiring having a predetermined shape, in such a manner as to not cover the connecting terminal region of the gate wiring. A protective insulating layer is patterned into a predetermined shape. After passing through a predetermined production process to produce an amorphous silicon thin film transistor array, at least a gate wiring and a source wiring are provided. The step of paterning the protective insulating layer comprises covering the connecting terminals of the gate wiring and the exposed region of the glass substrate with a photoresist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.