Dynamic RAM having a full size dummy cell
US4961166A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 1985 |
| Grant date | Oct 2, 1990 |
| Priority date | — |
| Expiry date | May 2, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4099
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic RAM, in which the difference between a data signal level from one of a pair of complementary data lines coupled to a memory cell and a reference potential level of the other of the complementary data lines is differentially amplified by a sense amplifier. The data line taking the reference potential level is coupled to the other data line through a switch element so that its data line capacitance is increased. As a result, the reference potential level is held at a relatively stable level irrespective of a leakage current such as that caused by .alpha. particles. This construction makes it possible to use a full-size dummy cell because the capacitance of the data lines which takes the reference potential level is increased. The reference potential level achieved by the use of the full-size dummy cell is made relatively accurate because of the relative accuracy between the capacitances of the memory cells and the capacitance of the full-size dummy cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.